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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 * version 2 for more details (a copy is included in the LICENSE file that
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#include "runtime/atomicAccess.hpp"
#include "utilities/spinCriticalSection.hpp"
#include "utilities/spinYield.hpp"

void SpinCriticalSection::spin_acquire(volatile int* adr) {
  if (AtomicAccess::cmpxchg(adr, 0, 1) == 0) {
    return;   // normal fast-path return
  }

  SpinYield sy(4096, 5, millis_to_nanos(1));

  // Slow-path : We've encountered contention -- Spin/Yield/Block strategy.
  for (;;) {
    while (*adr != 0) {
      sy.wait();
    }
    if (AtomicAccess::cmpxchg(adr, 0, 1) == 0) return;
  }
}

void SpinCriticalSection::spin_release(volatile int* adr) {
  assert(*adr != 0, "invariant");
  // Roach-motel semantics.
  // It's safe if subsequent LDs and STs float "up" into the critical section,
  // but prior LDs and STs within the critical section can't be allowed
  // to reorder or float past the ST that releases the lock.
  // Loads and stores in the critical section - which appear in program
  // order before the store that releases the lock - must also appear
  // before the store that releases the lock in memory visibility order.
  // So we need a #loadstore|#storestore "release" memory barrier before
  // the ST of 0 into the lock-word which releases the lock.
  AtomicAccess::release_store(adr, 0);
}